prefetch.rs - source
Description: Source of the Rust file `library/core/src/../../stdarch/crates/core_arch/src/aarch64/prefetch.rs`.

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core/stdarch/crates/core_arch/src/aarch64/
prefetch.rs

    1#[cfg(test)]
    2use stdarch_test::assert_instr;
    3
    4unsafe extern "unadjusted" {
    5    #[link_name = "llvm.prefetch"]
    6    fn prefetch(p: *const i8, rw: i32, loc: i32, ty: i32);
    7}
    8
    9/// See [`prefetch`](fn._prefetch.html).
    10#[unstable(feature = "stdarch_aarch64_prefetch", issue = "117217")]
    11pub const _PREFETCH_READ: i32 = 0;
    12
    13/// See [`prefetch`](fn._prefetch.html).
    14#[unstable(feature = "stdarch_aarch64_prefetch", issue = "117217")]
    15pub const _PREFETCH_WRITE: i32 = 1;
    16
    17/// See [`prefetch`](fn._prefetch.html).
    18#[unstable(feature = "stdarch_aarch64_prefetch", issue = "117217")]
    19pub const _PREFETCH_LOCALITY0: i32 = 0;
    20
    21/// See [`prefetch`](fn._prefetch.html).
    22#[unstable(feature = "stdarch_aarch64_prefetch", issue = "117217")]
    23pub const _PREFETCH_LOCALITY1: i32 = 1;
    24
    25/// See [`prefetch`](fn._prefetch.html).
    26#[unstable(feature = "stdarch_aarch64_prefetch", issue = "117217")]
    27pub const _PREFETCH_LOCALITY2: i32 = 2;
    28
    29/// See [`prefetch`](fn._prefetch.html).
    30#[unstable(feature = "stdarch_aarch64_prefetch", issue = "117217")]
    31pub const _PREFETCH_LOCALITY3: i32 = 3;
    32
    33/// Fetch the cache line that contains address `p` using the given `RW` and `LOCALITY`.
    34///
    35/// The `RW` must be one of:
    36///
    37/// * [`_PREFETCH_READ`](constant._PREFETCH_READ.html): the prefetch is preparing
    38///   for a read.
    39///
    40/// * [`_PREFETCH_WRITE`](constant._PREFETCH_WRITE.html): the prefetch is preparing
    41///   for a write.
    42///
    43/// The `LOCALITY` must be one of:
    44///
    45/// * [`_PREFETCH_LOCALITY0`](constant._PREFETCH_LOCALITY0.html): Streaming or
    46///   non-temporal prefetch, for data that is used only once.
    47///
    48/// * [`_PREFETCH_LOCALITY1`](constant._PREFETCH_LOCALITY1.html): Fetch into level 3 cache.
    49///
    50/// * [`_PREFETCH_LOCALITY2`](constant._PREFETCH_LOCALITY2.html): Fetch into level 2 cache.
    51///
    52/// * [`_PREFETCH_LOCALITY3`](constant._PREFETCH_LOCALITY3.html): Fetch into level 1 cache.
    53///
    54/// The prefetch memory instructions signal to the memory system that memory accesses
    55/// from a specified address are likely to occur in the near future. The memory system
    56/// can respond by taking actions that are expected to speed up the memory access when
    57/// they do occur, such as preloading the specified address into one or more caches.
    58/// Because these signals are only hints, it is valid for a particular CPU to treat
    59/// any or all prefetch instructions as a NOP.
    60///
    61///
    62/// [Arm's documentation](https://developer.arm.com/documentation/den0024/a/the-a64-instruction-set/memory-access-instructions/prefetching-memory?lang=en)
    63#[inline(always)]
    64#[cfg_attr(test, assert_instr("prfm pldl1strm", RW = _PREFETCH_READ, LOCALITY = _PREFETCH_LOCALITY0))]
    65#[cfg_attr(test, assert_instr("prfm pldl3keep", RW = _PREFETCH_READ, LOCALITY = _PREFETCH_LOCALITY1))]
    66#[cfg_attr(test, assert_instr("prfm pldl2keep", RW = _PREFETCH_READ, LOCALITY = _PREFETCH_LOCALITY2))]
    67#[cfg_attr(test, assert_instr("prfm pldl1keep", RW = _PREFETCH_READ, LOCALITY = _PREFETCH_LOCALITY3))]
    68#[cfg_attr(test, assert_instr("prfm pstl1strm", RW = _PREFETCH_WRITE, LOCALITY = _PREFETCH_LOCALITY0))]
    69#[cfg_attr(test, assert_instr("prfm pstl3keep", RW = _PREFETCH_WRITE, LOCALITY = _PREFETCH_LOCALITY1))]
    70#[cfg_attr(test, assert_instr("prfm pstl2keep", RW = _PREFETCH_WRITE, LOCALITY = _PREFETCH_LOCALITY2))]
    71#[cfg_attr(test, assert_instr("prfm pstl1keep", RW = _PREFETCH_WRITE, LOCALITY = _PREFETCH_LOCALITY3))]
    72#[rustc_legacy_const_generics(1, 2)]
    73#[unstable(feature = "stdarch_aarch64_prefetch", issue = "117217")]
    74// FIXME: Replace this with the standard ACLE __pld/__pldx/__pli/__plix intrinsics
    75pub unsafe fn _prefetch<const RW: i32, const LOCALITY: i32>(p: *const i8) {
    76    // We use the `llvm.prefetch` intrinsic with `cache type` = 1 (data cache).
    77    static_assert_uimm_bits!(RW, 1);
    78    static_assert_uimm_bits!(LOCALITY, 2);
    79    prefetch(p, RW, LOCALITY, 1);
    80}